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NXP Semiconductors /MIMXRT1052 /PXP /CSC1_COEF0

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Interpret as CSC1_COEF0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Y_OFFSET0UV_OFFSET0C00 (RSVD1)RSVD1 0 (BYPASS)BYPASS 0 (YCBCR_MODE)YCBCR_MODE

Description

Color Space Conversion Coefficient Register 0

Fields

Y_OFFSET

Two’s compliment amplitude offset implicit in the Y data
UV_OFFSET

Two’s compliment phase offset implicit for CbCr data
C0

Two’s compliment Y multiplier coefficient. YUV=0x100 (1.000) YCbCr=0x12A (1.164)
RSVD1

Reserved, always set to zero.
BYPASS

Bypass the CSC unit in the scaling engine
YCBCR_MODE

Set to 1 when performing YCbCr conversion to RGB

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data